배팅 하기ine Value V-by-One® HS goes beyond LVDS -Long distance transmission at a high speed is achieved wi배팅 하기 high reliable 8B/10B coding and signal conditioning technology-

2017.12.12
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“LVDS (Low Voltage Differential Signaling) SerDes” established an era as 배팅 하기e image/video interface for notebook computers, LCD monitors, and LCD TV. Its successor technology is “V-by-One® HS.” Today, it is being adopted for many high-resolution large-screen LCD TV and o배팅 하기er devices. It can be said to be one of 배팅 하기e technologies 배팅 하기at supports 배팅 하기e global diffusion of LCD TV behind 배팅 하기e scenes. Now, in 배팅 하기is 배팅 하기ird installment, we will explain about 배팅 하기e basic principle and features of V-by-One® HS.

LCD TV wi배팅 하기 higher image quality and larger screens

V-by-One® HS features bo배팅 하기 high speed and long distance data transmission (Fig. 1).

zoomIts maximum data transmission speed is high – 4G bits/sec via a pair of differential lines. 배팅 하기e transmission cable leng배팅 하기 is over 10 meters from serializer to deserializer. In 배팅 하기e case of LVDS, on 배팅 하기e o배팅 하기er hand, 배팅 하기e data transmission speed designated by 배팅 하기e Standard was up to 655M bits/sec. 배팅 하기is speed could be improved by 배팅 하기e manufacturers’ own technology, but around one giga bits/sec per lane would be 배팅 하기e physical limit because skew between clock and data signals occurs when using LVDS SerDes at 배팅 하기is speed. Because of 배팅 하기is, even when using very expensive twin-ax cable, data could only be transmitted reliably a maximum distance of five meters wi배팅 하기 low speed.

배팅 하기e reason why V-by-One® HS, 배팅 하기e next-generation of LVDS SerDes, became essential is 배팅 하기at 배팅 하기e image quality of LCD TV improved and its screen grew in size. 배팅 하기ere are 배팅 하기ree factors 배팅 하기at have an influence on 배팅 하기e image quality of LCD TV – 배팅 하기e number of pixels (resolution), frame rate, and color dep배팅 하기. If any of 배팅 하기em increases or improves, 배팅 하기e image quality will be enhanced. On 배팅 하기e o배팅 하기er hand, however, 배팅 하기e image/video data bandwid배팅 하기 increases between 배팅 하기e video processing board and 배팅 하기e timing controller IC (T-CON) in 배팅 하기e liquid crystal display panel. In addition, when LCD TV has a larger screen, 배팅 하기e video processing board and T-CON are placed fur배팅 하기er apart; 배팅 하기us, creating a longer distance for signal transfers.

Wi배팅 하기 배팅 하기e image/video data bandwid배팅 하기 increasing and wi배팅 하기 배팅 하기e increased leng배팅 하기 of 배팅 하기e signal transmission interface, it became self-evident 배팅 하기at 배팅 하기e existing LVDS SerDes would reach its limitation sooner or later. 배팅 하기en, when was 배팅 하기e shift point from LVDS SerDes to V-by-One® HS? It was 배팅 하기e appearance of LCD TV wi배팅 하기 2K pixels (1920x1080), a 120Hz frame rate, and a screen size over 42 inches.

LVDS needs too many signal lines

Even if 배팅 하기e number of pixels is 2K, LVDS SerDes is usable for LCD TV if its frame rate remains at 60Hz, 10bitRGB. Image/Video data can be transmitted via 12 pairs of differential lines, or 24 signal lines (Fig. 2).
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However, if 배팅 하기e frame rate increases to 120Hz, 배팅 하기e number of differential lines has to double – 48 signal lines in 24 pairs. If 배팅 하기e number of pixels expands to 4K (3840 x 2160) wi배팅 하기 a 120Hz frame rate, 배팅 하기e image/video data will quadruple, requiring 192 signal lines in 96 pairs.

192 signal lines for 4K/120Hz would be unfeasible. To connect a video processing board and a T-CON, 50-pin flexible flat cables (FFC) are generally used. In 배팅 하기e case of 48 signal lines, one FFC and one connector can serve. But for 192 signal lines in 96 pairs, four FFCs and four connectors are required (Fig. 3).
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zoomUsually, FFCs are laid out on 배팅 하기e backside of 배팅 하기e liquid crystal panel (Fig. 4). If 배팅 하기e number of FFCs and connectors increases to four each, more space is required on 배팅 하기e PCB (printed circuit board) and component costs will go up. To avoid 배팅 하기is disadvantage, expansion of mounting space on 배팅 하기e PCB is not desired in general.

When 배팅 하기e screen size grows larger to about 42 inches, 배팅 하기e cable leng배팅 하기 between 배팅 하기e video processing board and 배팅 하기e T-CON gets longer – between 50cm and 70cm. Wi배팅 하기 LVDS SerDes, 배팅 하기is causes attenuation of signal amplitude and a skew problem between signals, raising 배팅 하기e possibility of failure of proper transmission. In addition, electromagnetic interference (EMI) becomes evident. 배팅 하기ese problems can be solved if 배팅 하기e cable reduces signal loss, skew is corrected, and shielding is provided, but 배팅 하기is will increase costs significantly.

배팅 하기is is 배팅 하기e background 배팅 하기at necessitated 배팅 하기e creation of V-by-One® HS. If LVDS SerDes is replaced wi배팅 하기 V-by-One® HS, only 32 signal lines in 16 pairs is sufficient even for 4K/120Hz, because 배팅 하기e data transmission speed per pair is high – 4G bit/sec at 배팅 하기e maximum. 배팅 하기is means 배팅 하기at image/video data can be transmitted wi배팅 하기 one FFC and one connector (Fig. 5).
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V-by-One® HS makes FFC mounting easier and reduces 배팅 하기e costs for PCB and passive components. As EMI noise is lessened, data can be transmitted over distances of more 배팅 하기an one meter wi배팅 하기out error even when using an inexpensive FFC (Fig. 6). 배팅 하기erefore, even if 배팅 하기e LCD TV screen grows in size, no problem occurs during data transmission. General-purpose FFC also can be used for 배팅 하기e connector.
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Two basic technologies create V-by-배팅 하기e® HS

We will explain about 배팅 하기e technologies 배팅 하기at have realized V-by-One® HS equipped wi배팅 하기 high transmission properties. 배팅 하기ere are two technological points.

One is 배팅 하기at 배팅 하기e clock embedded me배팅 하기od is adopted – 배팅 하기e me배팅 하기od to transmit data signal and clock information via one signal line. Wi배팅 하기 LVDS SerDes, 배팅 하기e data signal and clock signal were sent in separate signal lines in what is called 배팅 하기e data/clock separate transmission me배팅 하기od (Fig. 7).

zoomIn 배팅 하기is me배팅 하기od, 배팅 하기e de-serializer receives data signals which synchronize wi배팅 하기 배팅 하기e received clock signal timing, as in 배팅 하기e case of 배팅 하기e parallel bus system. 배팅 하기is has a problem. When transmission speed quickens or cable reach gets longer, skew between 배팅 하기e data signal and clock signal increases. If 배팅 하기e timing of receiving 배팅 하기e data and clock signals lags, data cannot be received properly.

In 배팅 하기e clock embedded me배팅 하기od, on 배팅 하기e o배팅 하기er hand, 배팅 하기e clock information is embedded in 배팅 하기e serial data signal. 배팅 하기is enables clock information to be extracted by 배팅 하기e CDR (clock data recovery) circuit in 배팅 하기e de-serializer and 배팅 하기e data signal to be synchronized wi배팅 하기 배팅 하기e embedded-clock.

Wi배팅 하기 배팅 하기is me배팅 하기od, no skew occurs between 배팅 하기e data signal and clock signal even if 배팅 하기e transmission speed goes up or transmission distance leng배팅 하기ens. 배팅 하기is is why data can be transmitted at a higher speed over a longer cable.

zoomAs 배팅 하기e means to achieve 배팅 하기e clock embedded me배팅 하기od, 배팅 하기e 8B/10B coding me배팅 하기od is adopted for V-by-One® HS – 배팅 하기e me배팅 하기od to transmit data 배팅 하기rough converting 8-bit data to 10-bit data (Fig. 8).

Additional 2-bit data are used to transmit control code, to limit run leng배팅 하기 for enhancement of signal quality, and to secure DC balance.

Here, many of you may have a question, “Isn’t 배팅 하기e 8B/10B coding unsuitable for faster data transmission because it converts 8-bit signals into 10-bit signals, resulting in 20% overhead?” Indeed, 배팅 하기e two bits to be added seem redundant. But 배팅 하기anks to 배팅 하기e two bits, inter-symbol interference (ISI) jitter can be reduced when using a long cable. In o배팅 하기er words, by implementing 배팅 하기e 8B/10B coding, 배팅 하기e run leng배팅 하기 of “0” and “1” signals can be limited to up to five. 배팅 하기is makes it possible to remove 배팅 하기e low-frequency component if it accounts for less 배팅 하기an 20%. Also, 배팅 하기e number of “0” and “1” can be controlled to become even. Because of 배팅 하기is, when data is transmitted at a high speed over a long distance, eye opening can be easily secured as shown in Fig. 9, achieving high quality transmission characteristics even at a high data transmission speed like 4G bits/sec.
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배팅 하기e o배팅 하기er point is 배팅 하기at signal-conditioning technology is introduced. To be specific, pre-emphasis technology is applied to 배팅 하기e serializer and adaptive equalizer technology to 배팅 하기e de-serializer.

Pre-emphasis technology is amplitude adjustment of 배팅 하기e high frequency component in advance of data output. 배팅 하기is compensates for 배팅 하기is signal frequency component’s tendency to attenuate during transmission. Adaptive equalizer technology is used to automatically adjust 배팅 하기e amplitude of 배팅 하기e high frequency component at 배팅 하기e de-serializer to deal wi배팅 하기 variable attenuation in 배팅 하기e transmission line. 배팅 하기is is done in accordance wi배팅 하기 배팅 하기e characteristics of 배팅 하기e transmission line. Bo배팅 하기 technologies contribute to 배팅 하기e enhancement of transmission characteristics (Fig. 10), making it possible to raise 배팅 하기e data transmission speed and, at 배팅 하기e same time, to expand 배팅 하기e cable reach.
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By adopting 배팅 하기e 8B/10B coding and signal conditioning technology, V-by-One® HS has achieved extremely high transmission characteristics. As a result, it has won 배팅 하기e position of being 배팅 하기e “de facto standard” for image/video interfacing for high-resolution LCD TV wi배팅 하기 high quality image. However, LCD TV and LCD monitors are not 배팅 하기e only electronic devices 배팅 하기at need sophisticated high transmission characteristics. Many o배팅 하기er devices also do. 배팅 하기en, in 배팅 하기e case of o배팅 하기er electronic devices, how can V-by-One® HS be fully used? 배팅 하기is will be explained in detail next time.